The Center for Security and Emerging Technology (CSET) offers the following submission for the consideration of the Department of Commerce. The Department of Commerce requested information “in order to inform the planning and design of potential programs to: Incentivize investment in semiconductor manufacturing facilities and associated ecosystems; provide for shared infrastructure to accelerate semiconductor research, development, and prototyping; and support research related to advanced packaging and advanced metrology to ensure a robust domestic semiconductor industry.” 

CSET has provided responses to questions where we believe CSET research is responsive or, in some cases, where we are aware of reliable research that has attempted to answer the question.

Summary of key points and recommendations

SEMICONDUCTOR FINANCIAL ASSISTANCE PROGRAM

• U.S. overdependence on the supply of leading-edge logic, DRAM, and legacy logic chipmaking capacity, as well as Assembly, Test, and Packaging (ATP) capacity in East Asia threatens U.S. economic and national security. The United States should therefore:
  • Focus CHIPS Act manufacturing incentives on leading-edge logic (first priority), DRAM (second priority), and legacy logic chips (third priority).
  • Increase advanced packaging facility capacity in the United States.
  • Increase supply of advanced packaging equipment and supplies in the United States.
  • Target research and development that supports innovation in advanced packaging.
• When reviewing applications for federal financial assistance, the Secretary should consider a range of factors that are not currently addressed in Section 9902 of the NDAA, including potential stipulations about covered entities, eligibility criteria, and relevant bidding categories.
• To maximize the initial scale of projects and to ensure ongoing reinvestment in project expansions, tool upgrades, and productivity improvements for the projects to remain economically viable and competitive over time, we suggest following the recommendations in a 2017 study by the Potomac Institute for Policy Studies:
  • Ensure that the funding level of any major public-private R&D initiative is at a magnitude that mirrors previous successful initiatives: $200-$300 million per year, 10-year timeline, total budget of $2-$3 billion.
  • Include costs for technology transition and insertion in all major public-private R&D program budgets.
  • Have government R&D efforts focus on low volume, customizable manufacturing solutions to technical challenges.
  • Use OTA acquisition mechanisms in all R&D programs.
• To ensure that semiconductor startups and small- and mid-sized companies have access to commercial fabrication, assembly, testing and packaging facilities and associated technical expertise, we suggest establishing the following facilities, as recommended in a 2021 study by In-Q-Tel:
  • A national facility to field innovative semiconductor tools and fabricate next-generation microelectronics products in areas critical to national security 
  • A fabrication sandbox to provide startups access to commercial equipment and tools, early design validation, and valuable testing data to share with potential investors while the government gains early access to innovative technology that could be tested against government requirements and inform future mission planning and acquisition needs
  • A dedicated Advanced Packaging facility that could test how U.S. chip designs work with Advanced Packaging processes and accelerate the transfer of technology from the lab, helping propel U.S. companies toward leadership in this emerging field. 

ADVANCED PACKAGING MANUFACTURING PROGRAM

• The United States should focus funding for advanced packaging innovation on R&D related to chiplets and heterogeneous integration, equipment automation, and wafer-level packaging. 
  • These areas of innovation promise to increase semiconductor performance while reducing power consumption, cost, and form factor should be prioritized. 
  • They are also easily commercialized, flexible, and scalable.
• Given the increasing importance of IC substrates, some funding could be directed to encourage formation of one or more joint ventures (either between an OSAT and a substrate supplier, a foundry/IDM and substrate supplier, or a substrate and PCB supplier) to increase domestic production.

SEMICONDUCTOR WORKFORCE

• CHIPS Act manufacturing incentives will likely generate tens of thousands of new jobs, thousands of which will likely need to be filled by immigrants. 
  • Experienced, high-skilled foreign talent will be especially needed for engineering roles, where we have estimated that employment could grow by 19 percent over the next decade. 
• The United States can and should invest in growing the pipeline of American students in semiconductor-relevant graduate programs. Options for investment include:
  • K-12 STEM education
  • Funded 4+1 (undergraduate + master’s) programs in semiconductor-related fields
  • On-the-job training programs to help graduates acquire the tacit engineering know-how required for many semiconductor manufacturing-related careers.
• The United States should also facilitate high-skilled immigration of foreign-born workers, especially those with experience in semiconductor engineering.
  • Policymakers should consider establishing an accelerated immigration pathway for experienced fab workers—perhaps specifically for Taiwanese or South Korean workers seeking to work in newly constructed fabs in the United States.
  • Caps on employment-based green cards should also be lifted for workers in the semiconductor industry, or perhaps for workers in national-security-relevant industries more broadly, if those workers have relevant master’s or doctoral degrees. This will be particularly helpful for U.S. firms like Intel which currently employ many workers using employment-based green cards.