The following notice—one of many local Chinese semiconductor industry incentive policies—describes how integrated circuit (IC) design and manufacturing companies can apply for local government subsidies in Shenzhen, a major tech hub in southern China. Shenzhen’s program subsidizes projects related to IC tape-out the most generously, with lesser amounts available for IC design and electronic design automation (EDA) software development. The notice threatens applicants with blacklisting or worse for submitting fraudulent applications, suggesting that such conduct on the part of applicants is not unheard of.
An archived version of the Chinese source text is available online at: https://perma.cc/Q9RN-D6H5
Project Application Guide for the Shenzhen Science and Technology Innovation Commission’s 2024 Annual Integrated Circuit Special Project Subsidy Program
I. Application Contents
(i) Tape-out support for integrated circuit (IC) design enterprises
- Subsidies for multi-project wafer (MPW) direct tape-out;
- Subsidies for first-time completion of full-mask (全掩膜) engineering product tape-out.
(ii) Support for the purchase of silicon intellectual property (IP) by IC design enterprises
IP purchase expense subsidies are given for enterprises to purchase IP to carry out high-end chip research and development (R&D).
(iii) Support for the R&D of IC electronic design automation (EDA) design tools
EDA R&D expense subsidies are given for enterprises engaged in the R&D of IC EDA design tools.
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